Starblaze Achieves First-Pass Silicon Success For Storage SoC

Synopsys has announced that Starblaze has achieved first-pass silicon success for its MB1000 enterprise SSD controller using Synopsys’ DesignWare ARC HS38 processor as well as DDR4 and PCI Express controller and PHY IP. Starblaze selected the ARC HS38 processor because it offers multicore support for SMP Linux, a 40-bit physical address space and the ARC Processor EXtension (APEX) technology that enabled them to add instructions to reduce I/O latency. Furthermore, the ARC HS38 processor offers higher performance at half the power consumption compared to competitive processors. Starblaze also selected DesignWare DDR4 and PCI Express 3.1 IP for its high quality and rich set of features. By using DesignWare IP, Starblaze met their performance requirements and delivered a differentiated, production-ready design within a tight time-to-market schedule.

“To succeed in the highly competitive storage market, we have to meet extremely aggressive design goals for our MB1000 enterprise SSD controller,” said Sky Shen, CEO at Starblaze. “After conducting competitive analysis, microarchitecture exploration and hardware/software benchmark analysis, we determined that Synopsys’ silicon-proven ARC HS38 processor and DDR4 and PCI Express 3.1 IP offered the best combination of power, performance and area to meet our needs.”

DesignWare DDR4 and PCI Express 3.1 IP features enhance SoC differentiation
By choosing DesignWare IP, Starblaze was able to reduce their system hardware requirements, reduce power consumption, improve performance and cut their overall costs. Starblaze selected the DesignWare DDR4 IP to enable more efficient memory access in its storage applications. The IP supports high-capacity DDR4 and DDR4 3D stacked (DDR4-3DS) DRAM with 16 ranks of memory to expand capacity by up to 400 percent compared to the previously supported four ranks, without reducing performance. Starblaze also integrated the high-performance DesignWare IP for PCI Express 3.1, which delivers 98% throughput efficiency with low latency. The DesignWare IP for PCI Express 3.1 supports PCI-SIG Single Root I/O Virtualization (SR-IOV) technology, which enables the simultaneous sharing of peripherals across multiple CPUs or operating systems. Both the DesignWare DDR4 and PCI Express 3.1 IP include reliability, availability and serviceability (RAS) features to increase data protection, system availability and issue diagnosis for high-performance, data-intensive applications such as enterprise SSDs. Starblaze performance results at the near-end with DesignWare IP for PCI Express 3.1 show clear eyes and wide margins.

Increasing processing performance on a low power budget
To get their new gen PCI Express-based MB1000 SSD to production quickly, Starblaze selected Synopsys’ DesignWare ARC HS38 processor and MetaWare Development Toolkit. The ARC HS38 processor’s high-speed pipeline and optimized instruction set architecture (ISA) include features that enabled Starblaze to achieve the high I/O operations per second required to meet their design goals. Speculative instruction execution in the processor increases instruction-level parallelism by allowing subsequent instructions to propagate through the pipeline even before current instructions have retired. In addition, the ARC HS38 processor has single-cycle load-to-use latencies for many instructions due to internal forwarding paths and a late ALU stage in the 10-stage pipeline, reducing stalls and yielding higher efficiency in the program flow. The ARC HS38 processor also has load and store queues that support multiple outstanding memory transactions, and support 64-bit loads and stores and non-aligned load/store accesses, without extra cycle penalties, so blocks of data can be moved efficiently.

Starblaze used several features in the ARC HS38 processor to improve performance, reduce power consumption and accelerate software development for their MB1000 SSD controller including:

• Dual-core implementation that enables efficient resource sharing and scheduling to achieve high input/output operations per second (IOPS)
• Support for SMP Linux that eases software developmentSupport for a 40-bit physical address for one terabyte of physical memory to achieve faster data access
• Error correction code (ECC) support for embedded memories that provides implicit error handling by the processor without software programming overhead. This was critical to Starblaze achieving the extremely high data reliability over long periods of operation required for enterprise SSDs
• APEX technology that enables the addition of custom instructions, condition codes, core registers and auxiliary registers to the base ARC HS pipeline to improve I/O latencies

“For more than a decade, Synopsys has been delivering high-quality processor and interface IP solutions with differentiated features, enabling companies like Starblaze to achieve the performance, power and area requirements for their storage application,” said John Koeter, vice president of marketing for IP at Synopsys. “Starblaze’s first-pass silicon success of their MB1000 SSD controller using our ARC HS38 processor, which has been shipped in more than three billion flash storage products, and our interface IP demonstrates how Synopsys helps designers meet their design goals and quickly get their products to market.”

More information: Synopsys