It has been announced by Synopsys that its DesignWare Logic Library, Embedded Memory, Interface and Analog IP on TSMC’s 7-nanometer (nm) process technology has achieved more than 250 design wins.
Close to 30 leading semiconductor companies have selected Synopsys’ 7nm DesignWare IP portfolio to deliver their high-performance, low-power system-on-chips (SoCs) for a range of applications including mobile, cloud computing, and automotive. By achieving broad adoption of its DesignWare IP with multiple customer silicon successes, Synopsys enables designers to integrate the IP with confidence and significantly lower SoC integration risk.
Suk Lee, Senior Director, Design Infrastructure Management Division at TSMC, said: “TSMC’s close collaboration with Synopsys through many process generations underscores our mutual commitment to providing designers with IP that helps them solve critical design challenges and quickly ramp to volume production.
“As an experienced ecosystem partner of TSMC, Synopsys continues to be in the forefront of providing IP solutions that address the performance, power, and area requirements of SoCs implemented on TSMC’s industry-leading 7-nanometer process targeting AI, automotive, and cloud applications.”
John Koeter, Vice President of Marketing for IP at Synopsys, added: “To meet today’s demands of AI workloads, video streaming, and other data-intensive operations in the cloud and on the edge, designers are relying on Synopsys for proven IP solutions in the most advanced, high-performance FinFET processes.
“The silicon-proven DesignWare IP on TSMC’s 7-nanometer process has been extensively validated through broad customer adoption and enables designers to quickly deliver differentiated products with less risk for faster time-to-market.”
The DesignWare IP portfolio on TSMC 7nm and 7nm Plus processes are available now.
