First-Pass Silicon Success of Data Flow SoC Test Chip
Synopsys has announced that NSITEXE, Inc. achieved success with its first silicon for Data Flow Processor (DFP)-based SoC test chip by using Synopsys design, verification and IP solutions.
The DFP has an architecture that combines both a CPU and a GPU designed for processing large and complex datasets, allowing for parallel data management, and enabling application-independent capability with power-efficient parallelism and high quality, proven through many automotive systems. NSITEXE adopted Synopsys design, test and verification solutions, and DesignWare IP for the development of its next-generation SoC and achieving first-pass silicon success.
“We deliver DFP-based IP solutions and services for customers including tier 1, industrial and smart household appliances, which enable various applications such as next generation automotive system with autonomous drive, robotics, factory automation, and IoT,” said Yukihide Niimi, President and CEO at NSITEXE. “We are pleased to achieve a successful development and validation of our DFP-based test chip in short turnaround time by leveraging Synopsys design, test, verification, and IP solutions.”
Level-4 and higher autonomous driving vehicles are required to adapt to the environment, to control the vehicle, and to conduct synchronized communications with the cloud. A wide range of technologies is necessary to develop these functions while maintaining high reliability and safety.
To address these challenges, Synopsys provides comprehensive automotive solutions:
- Synopsys virtual prototyping solutions provide early access to silicon chips and virtual ECUs, allowing software development and testing to start up to 12 months before hardware is available.
- Synopsys Fusion Design Platform provides the industry’s most comprehensive portfolio of foundry certified tools and flows. It enables full-flow optimization for concurrent clock and data (CCD), wire synthesis, and logic restructuring, delivering high performance while supporting low power consumption, small area and a high level of functional safety.
- Synopsys test solutions enable early validation of complex design-for-test (DFT) logic supported through full RTL integration while maintaining physical-, timing-, and power-awareness.
- The Synopsys Verification Continuum Platform natively integrates verification technologies, including virtual prototyping, static and formal verification, simulation, emulation, FPGA-based prototyping, debug and verification IP (VIP), to accelerate verification closure.
- Synopsys’ broad portfolio of silicon-proven DesignWare IP for automotive applications includes Interface IP, Logic Libraries, Embedded Memories, Data Converters, ARC Processors, Security IP and the Sensor and Control IP Subsystem. The ASIL Ready ISO 26262 certified IP portfolio with automotive safety packages accelerates SoC-level functional safety assessments to help designers reach target ASIL levels.
“Our integrated EDA, silicon-proven IP, and software security and quality solutions are widely used by industry-leading companies in automotive, AI, networking, and mobile applications,” said Kimio Fujii, President of Synopsys Japan. “The successful development of NSITEXE’s advanced SoC test chip demonstrates how our solutions accelerate time-to-market of the next generation processors.”
Specific Synopsys products used to develop NSITEXE DFP SoC include:
- Design solutions including Design Compiler Graphical, IC Compile II, PrimeTime SI, and Formality Ultra tools.
- Test solutions.
- Verification solutions including SpyGlass, VC Formal, VCS, and Verdi tools, and VIP.
- DesignWare IP including PCI Express, LPDDR4, AMBA Fabric and AXI DMA Controller, STAR Memory System, STAR Hierarchical System, and Logic Libraries and Embedded Memories.
Synopsys’ customers can learn more about NSITEXE design success by attending the Synopsys User Group (SNUG) Japan, on September 13th, 2019 at the PAMIR International Convention Center of Grand Prince Hotel New Takanawa in Shinagawa, Tokyo.